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general description the max5921/max5939 hot-swap controllers allow a cir- cuit card to be safely hot plugged into a live backplane. the max5921/max5939 operate from -20v to -80v and are well suited for -48v power systems. these devices are pin compatible with both the lt1640 and lt4250 and provide improved features over these devices. the max5921/max5939 provide a controlled turn-on to circuit cards preventing damage to board connectors, board components, and preventing glitches on the power-supply rail. the max5921/max5939 provide undervoltage, overvoltage, and overcurrent protection. these devices ensure that the input voltage is stable and within tolerance before applying power to the load. both the max5921 and max5939 protect a system against overcurrent and short-circuit conditions by turn- ing off the external mosfet in the event of a fault con- dition. the max5921/max5939 protect against input voltage steps by limiting the load current to a safe level without turning off power to the load. the device features an open-drain power-good status output, pwrgd or pwrgd for enabling downstream converters (see selector guide ). a built-in thermal shut- down feature is also included to protect the external mosfet in case of overheating. the max5939 features a latched fault output. the max5921 contains built-in autoretry circuitry after a fault condition. the max5921/max5939 are available in an 8-pin so package and operate in the extended -40? to +85? temperature range. applications telecom line cards network switches/routers central-office line cards server line cards base-station line cards features ? allows safe board insertion and removal from a live -48v backplane ? pin-compatible with lt1640 and lt4250 ? circuit breaker immunity to input voltage steps and current spikes ? 450ma gate pulldown current during short- circuit condition ? exponential gate pulldown current ? withstands -100v input transients with no external components ? programmable inrush and short-circuit current limits ? operates from -20v to -80v ? programmable overvoltage protection ? programmable undervoltage lockout with built-in glitch filter ? overcurrent fault integrator ? powers up into a shorted load ? power-good control output ? thermal shutdown protects external mosfet max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current ________________________________________________________________ maxim integrated products 1 gate sense v ee 1 2 8 7 v dd drain ov uv pwrgd (pwrgd) so top view 3 4 6 5 max5921 max5939 () for max5921b/f and max5939b/f. pin configuration ordering information 19-2946; rev 1; 2/06 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin-package max5921 aesa -40? to +85? 8 so max5921besa -40? to +85? 8 so typical operating circuit and selector guide appear at end of data sheet. ordering information continued at end of data sheet.
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v ee = 0v, v dd = 48v, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25?, unless otherwise noted.) (notes 1, 4) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. all voltages are referenced to v ee , unless otherwise noted supply voltage (v dd - v ee ) ................................-0.3v to +100v drain, pwrgd, pwrgd ....................................-0.3v to +100v pwrgd to drain .............................................?-0.3v to +95v pwrgd to v dd .......................................................-95v to +85v sense (internally clamped) .................................-0.3v to +1.0v gate (internally clamped) ....................................-0.3v to +18v uv and ov..............................................................-0.3v to +60v current into sense...........................................................+40ma current into gate...........................................................+300ma current into any other pin................................................+20ma continuous power dissipation (t a = +70?) 8-pin so (derate 5.9mw/? above +70?)..................471mw operating temperature range ...........................-40? to +85? junction temperature .....................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units power supplies operating input voltage range v dd 20 80 v supply current i dd current into v dd with uv = 3v, ov, drain, sense = v ee , gate = floating 0.7 2 ma gate driver and clamping circuits gate pullup current i pu gate drive on, v gate = v ee -30 -45 -60 ? gate pulldown current i pd v sense - v ee = 100mv, v gate = 2v (note 2) 24 50 70 ma external gate drive ? v gate v gate - v ee , steady state, 20v v dd 80v 10 13.5 18 v gate to v ee clamp voltage v gsclmp v gate - v ee , i gs = 30ma 15 16.4 18 v circuit breaker current-limit trip voltage v cl v cl = v sense - v ee 40 50 60 mv sense input current i sense v sense = 50mv -1 -0.2 0a undervoltage lockout supply internal undervoltage lockout voltage high v uvloh v dd increasing 13.8 15.4 17.0 v supply internal undervoltage lockout voltage low v uvlol v dd decreasing 11.8 13.4 15.0 v uv input uv high threshold v uvh uv voltage increasing 1.240 1.255 1.270 v uv low threshold v uvl uv voltage decreasing 1.105 1.125 1.145 v uv hysteresis v uvhy 130 mv uv input current i inuv uv = v ee -0.5 0a ov input ov high threshold v ovh ov voltage rising 1.235 1.255 1.275 v ov low threshold v ovl ov voltage decreasing 1.189 1.205 1.221 v ov voltage reference hysteresis v ovhy 50 mv ov input current i inov ov = v ee -0.5 0a
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current _______________________________________________________________________________________ 3 electrical characteristics (continued) (v ee = 0v, v dd = 48v, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25?, unless otherwise noted.) (notes 1, 4) parameter symbol conditions min typ max units pwrgd output signal (referenced to drain) drain input current i drain v drain = 48v 10 80 250 ? drain threshold for pwrgd v dl v drain - v ee threshold for power-good condition, drain decreasing 1.1 1.7 2.0 v gate high threshold v gh ? v gate - v gate , decreasing 1.0 1.6 2.0 v v pwrgd = 80v, v drain = 48v 10 pwrgd, pwrgd output leakage i oh v pwrgd = 80v, v drain = 0v 10 ? pwrgd low voltage (v pwrgd - v ee ) v ol v drain - v ee < v dl , i sink = 5ma (a, e versions) 0.11 0.4 v pwrgd low voltage (v pwrgd - v drain ) v ol v drain = 5v, i sink = 5ma (b, f versions) 0.11 0.4 v overtemperature protection overtemperature threshold t ot ( th ) junction temperature, temperature rising 135 ? overtemperature hysteresis t hys see thermal shutdown section 20 ? ac parameters ov high to gate low t phlov figures 1a, 2 0.5 ? uv low to gate low t phluv figures 1a, 3 0.4 ? ov low to gate high t plhov figures 1a, 2 3.3 ? uv high to gate high t plhuv figures 1a, 3 8.4 ms sense high to gate low t phlsense figures 1a, 4a 1 s a, b versions 0.35 0.5 0.65 current limit to gate low t phlcl time from continuous current limit to gate shutdown (see overcurrent fault integrator section), figures 1b, 4b e, f versions 1.4 2.0 2.6 ms figures 1a, 5a; a and e versions 8.2 drain low to pwrgd low drain low to (pwrgd - drain) high t phldl figures 1a, 5a; b and f versions 8.2 ms figures 1a, 5b; a and e versions 8.2 gate high to pwrgd low gate high to (pwrgd - drain) high t phlgh figures 1a, 5b; b and f versions 8.2 ms turn-off latch-off period t off (note 3) a, b, e, f versions 128 x t phlcl ms note 1: all currents into device pins are positive; all currents out of device pins are negative. all voltages are referenced to v ee , unless otherwise specified. note 2: gate pulldown current after the current limit to gate low (t phlcl ) time has elapsed. note 3: minimum duration of gate pulldown following a circuit breaker fault. the max5921_ automatically restarts after a circuit breaker fault. the max5939_ is latched off and can be reset by toggling uv low. the gate pulldown does not release until t off has elapsed. note 4: the min/max limits are 100% production tested at +25? and +85? and guaranteed by design at -40c.
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current 4 _______________________________________________________________________________________ t ypical operating characteristics (v dd = +48v, v ee = 0v, t a = +25?, unless otherwise noted.) 43.0 43.2 43.8 43.6 43.4 44.8 44.6 44.2 44.0 44.4 45.0 -40 10 -15 35 6 085 gate pullup current vs. temperature max5921toc04 temperature ( c) gate pullup current ( a) v gate = 0v 25 30 45 40 35 65 55 50 60 70 -40 10 -15 35 6 085 gate pulldown current vs. temperature after a fault max5921toc05 temperature ( c) gate pulldown current (ma) v gate = 2v 0 15 60 45 30 75 90 040 20 60 80 100 gate pulldown current vs. overdrive during a current fault max5921toc06 overdrive (mv) gate pulldown current (ma) v gate = 2v 0 100 400 300 200 500 600 900 750 1050 1200 gate pulldown current vs. overdrive during a short circuit max5921toc07 overdrive (mv) gate pulldown current (mv) v gate = 2v 0 40 160 120 80 20 140 100 60 180 -40 10 -15 35 60 85 pwrgd output low voltage vs. temperature (max5921a) max5921toc08 temperature ( c) pwrgd output low voltage (mv) i out = 5ma 0.001 0.01 10 1 0.1 100 -40 10 -15 35 60 85 pwrgd output leakage current vs. temperature (max5921b) max5921toc09 temperature ( c) pwrgd output leakage current (na) v drain - v ee > 2.4v 0 200 100 500 400 300 800 700 600 900 040 20 60 80 100 supply current vs. supply voltage max5921toc01 supply voltage (v) supply current ( a) t a = +85 c t a = +25 c t a = -40 c 7 9 8 12 11 10 14 13 15 040 20 60 80 100 gate voltage vs. supply voltage max5921toc02 supply voltage (v) gate voltage (v) t a = +25 c 40 42 48 46 44 58 56 52 50 54 60 -40 10 -15 35 6 085 current-limit trip voltage vs. temperature max5921toc03 temperature ( c) trip voltage (mv)
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current _______________________________________________________________________________________ 5 max5921 max5939 pwrgd/pwrgd ov uv v ee v dd drain gate sense r 5k ? v+ 5v v ov v uv v sense v drain v s + - +48v figure 1a. test circuit 1 max5921 max5939 ov uv v ee v dd drain gate sense v uv v s + - +48v v s + - +20v 10k ? 10 ? irf530 0.1 f pwrgd/pwrgd figure 1b. test circuit 2
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current 6 _______________________________________________________________________________________ timing diagrams 1.255v ov t phlov 0v 2v 1v 1.205v 1v t plhov gate figure 2. ov to gate timing t phluv 1.125v 1v 1v 1.255v t plhuv uv 0v 2v gate figure 3. uv to gate timing 60mv 1v 100mv gate sense v ee t phlsense figure 4a. sense to gate timing t phlcl 1v 1v uv gate figure 4b. active current-limit threshold
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current _______________________________________________________________________________________ 7 timing diagrams (continued) drain pwrgd pwrgd drain 1.4v 1.4v v ee v ee v ee 1v 1v t phldl t phldl v dcen - v drain = 0v figure 5a. drain to pwrgd /pwrgd timing ? v gate - v gate = 0v 1.4v gate pwrgd 1v v ee v ee ? v gate - v gate = 0v gate pwrgd 1.4v v dcen - v drain = 0v t phlgh t phlgh 1v figure 5b. gate to pwrgd /pwrgd timing uvlo v dd and reference generator logic output driver gate driver max5921/max5939 ref 50mv uv ov v dd v dd ref v ee sense gate drain v dl v gh ? v gate pwrgd pwrgd v ee block diagram
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current 8 _______________________________________________________________________________________ detailed description the max5921/max5939 integrated hot-swap controllers for -48v power systems allow circuit boards to be safely hot plugged into a live backplane without causing a glitch on the power-supply rail. when circuit boards are inserted into a live backplane, the bypass capacitors at the input of the board? power module or switching power supply can draw large inrush currents as they charge. uncontrolled inrush currents can cause glitches on the system power supply and damage components on the board. the max5921/max5939 provide a controlled turn-on to circuit cards preventing damage to connectors, board components, and prevent glitches on the power-supply rail. both the max5921/max5939 provide undervolt- age, overvoltage, and overcurrent protection. the max5921/max5939 ensure that the input voltage is sta- ble and within tolerance before applying power to the load. the device also provides protection against input voltage steps by limiting the load current to a safe level without turning off power to the load. pin description pin max5921a/ max5921e max5939a/ max5939e max5921b/ max5921f max5939b/ max5939f name function 1 pwrgd power-good signal output. pwrgd is an active-low open-drain status output referenced to v ee . pwrgd latches low when v drain - v ee v dl and v gate > ? v gate indicating a power-good condition. pwrgd is open drain otherwise. ? pwrgd power-good signal output. pwrgd is an active-high open-drain status output refer- enced to drain. pwrgd latches in a high-impedance state when v drain - v ee v dl and v gate > ? v gate - v gh indicating a power-good condition. pwrgd is pulled low to drain otherwise. 22ov overvoltage detection input. ov is referenced to v ee . when ov is pulled above v ovh voltage, gate pulls low. gate remains low until the ov voltage reduces to v ovh - v ovhy . 33uv undervoltage detection input. uv is referenced to v ee . when uv is pulled above v uvh voltage, the gate is enabled. when uv is pulled below v uvl , gate pulls low. uv is also used to reset the circuit breaker after a fault condition. to reset the circuit breaker, pull uv below v uvl . the reset command can be issued immediately after a fault condition; however, the device will not restart until a t off delay time has elapsed after the fault condition is removed. 44v ee negative power-supply input. connect to the negative power-supply rail. 55 sense current-sense input. connect to the external sense resistor and the source of the external mosfet. the voltage drop across the external sense resistor is monitored to detect overcurrent or short-circuit fault conditions. connect sense to v ee to disable the current- limiting feature. 66 gate gate drive output. connect to the gate of the external n-channel mosfet. 77 drain output voltage sense input. connect to the output voltage node (drain of external n- channel mosfet). place the max5921/max5939 such that drain is close to the drain of the external mosfet for the best thermal protection. 88v dd positive power-supply input. this is the power ground in the negative supply voltage system. connect to the higher potential of the power-supply inputs.
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current _______________________________________________________________________________________ 9 board insertion figure 6a shows a typical hot-swap circuit for -48v sys- tems. when the circuit board first makes contact with the backplane, the drain to gate capacitance (c gd ) of q1 pulls up the gate voltage to roughly iv ee x (c gd /c gd + c gs )i. the max5921/max5939 feature an internal dynamic clamp between gate and v ee to keep the gate-to-source voltage of q1 low during hot insertion preventing q1 from passing an uncontrolled current to the load. for most applications, the internal clamp between gate and v ee of the max5921/ max5939 eliminates the need for an external gate-to- source capacitor. the resistor r3 limits the current into the clamp circuitry during card insertion. power-supply ramping the max5921/max5939 can reside either on the back- plane or the removable circuit board (figure 6a). power is delivered to the load by placing an external n-chan- nel mosfet pass transistor in the power-supply path. after the circuit board is inserted into the backplane, and the supply voltage at v ee is stable and within the undervoltage and overvoltage tolerance, the max5921/max5939 gradually turn on the external mosfet by charging the gate of q1 with a 45? cur- rent source. capacitor c2 provides a feedback signal to accurately limit the inrush current. the inrush current can be calculated: i inrush = i pu x c l / c2 where c l is the total load capacitance, c3 + c4, and i pu is the gate pullup current. figure 6b shows the inrush current waveform. the cur- rent through c2 controls the gate voltage. at the end of the drain ramp, the gate voltage is charged to its final value. the gate-to-sense clamp limits the maxi- mum ? v gate to 18v. board removal if the circuit card is removed from the backplane, the volt- age at the uv falls below the uvlo detect threshold, and the max5921/max5939 turn off the external mosfet. current limit and electronic circuit breaker the max5921/max5939 provide current-limiting and cir- cuit-breaker features that protect against excessive load current and short-circuit conditions. the load current is monitored by sensing the voltage across an external sense resistor connected between v ee and sense. max5921 max5939 v ee ov uv sense gate drain pwrgd v dd -48v rtn -48v rtn short pin v in + v in - vicor vi-j3d-cy -48v gate in c4 100 f 100v c3 0.1 f 100v c2 15nf 100v r3 1k ? 5% r2 10 ? 5% q1 irf530 r1 0.02 ? 5% r4 549k ? 1% r5 6.49k ? 1% r6 10k ? 1% 4.7nf figure 6a. inrush control circuitry/typical application circuit
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current 10 ______________________________________________________________________________________ if the voltage between v ee and sense reaches the cur- rent-limit trip voltage (v cl ), the max5921/max5939 pull down the gate and regulate the current through the external mosfet such that v sense - v ee < v cl . if the current drawn by the load drops below v cl / r sense limit, the gate voltage rises again. however, if the load current is at the regulation limit of v cl / r sense for a peri- od of t phlcl , the electronic circuit breaker trips, causing the max5921/max5939 to turn off the external mosfet. after an overcurrent fault condition, the max5921 auto- matically restarts after t off has elapsed. the max5939 circuit breaker is reset by toggling uv or by cycling power. unless power is cycled to the max5939, the device waits until t off has elapsed before turning on the gate of the external fet. load-current regulation the max5921/max5939 accomplish load-current regu- lation by pulling current from gate whenever v sense - v ee > v cl . this decreases the gate-to-source voltage of the external mosfet, thereby reducing the load current. when v sense - v ee < v cl , the max5921/max5939 pulls gate high by a 45? (i pu ) current. exponential current regulation the max5921/max5939 provide an exponential pull- down current to turn off the external fet in response to overcurrent conditions. the gate pulldown current increases (see typical operating characteristics ) in response to v sense - v ee potentials greater than 50mv (v cl ). load current regulation (short-circuit condition) the max5921/max5939 devices also include a very fast high-current pulldown source connected to gate (see typical operating characteristics ). the high-cur- rent pulldown activates if v sense exceeds v ee by 650mv (typ) during a catastrophic overcurrent or short- circuit fault condition. the high-current pulldown circuit sinks as much as 450ma from gate to turn off the external mosfet. immunity to input voltage steps the max5921/max5939 guard against input voltage steps on the input supply. a rapid increase in the input supply voltage (v dd - v ee increasing) causes a current step equal to i = c l x ? v in / ? t, proportional to the input voltage slew rate ( ? v in / ? t). if the load current exceeds v cl / r sense during an input voltage step, the max5921/ max5939 current limit activates, pulling down the gate voltage and limiting the load current to v cl / r sense . the drain voltage (v drain ) then slews at a slower rate than the input voltage. as the drain voltage starts to slew down, the drain-to-gate feedback capacitor c2 pushes back on the gate, reducing the gate-to-source voltage (v gs ) and the current through the external mosfet. once the input supply reaches its final value, the drain slew rate (and therefore the inrush current) is limited by the capacitor c2 just as it is limited in the startup condi- tion (see the power-supply ramping section). to ensure correct operation, r sense must be chosen to provide a current limit larger than the sum of the load current and the dynamic current into the load capacitance in the slewing mode. if the load current plus the capacitive charging current is below the current limit, the circuit breaker does not trip. undervoltage and overvoltage protection use uv and ov to detect undervoltage and overvoltage conditions. uv and ov internally connect to analog com- parators with 130mv (uv) and 50mv (ov) of hysteresis. when the uv voltage falls below its threshold or the ov voltage rises above its threshold, gate pulls low. gate is held low until uv goes high and ov is low, indicating that the input supply voltage is within specification. the max5921/max5939 includes an internal lockout (uvlo) that keeps the external mosfet off until the input supply voltage exceeds 15.4v, regardless of the uv input. uv is also used to reset the circuit breaker after a fault condition has occurred. pull uv below v uvl to reset the circuit breaker. gate - v ee 10v/div v ee 50v/div drain 50v/div inrush current 1a/div 4ms/div figure 6b. inrush control waveforms
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current ______________________________________________________________________________________ 11 figure 10 shows how to program the undervoltage and overvoltage trip thresholds using three resistors. with r4 = 549k ? , r5 = 6.49k ? , and r6 = 10k ? , the undervolt- age threshold is set to 38.5v (with a 43v release from undervoltage), and the overvoltage is set to 71v. the resistor-divider also increases the hysteresis and over- voltage lockout to 4.5v and 2.8v at the input supply, respectively. pwrgd /pwrgd output use the pwrgd (pwrgd) output to enable a power module after hot insertion. use the max59__a ( pwrgd ) to enable modules with an active-low enable input (figure 12), or use the max59__b (pwrgd) to enable modules with an active-high enable input (figure 11). the pwrgd signal is referenced to the drain termi- nal, which is the negative supply of the power module. the pwrgd signal is referenced to v ee . when the drain voltage of the max5921a (see selector guide for complete selection) or max5939a is high with respect to v ee or the gate voltage is low from an undervoltage condition, then the internal pull- down mosfet q2 is off. the pwrgd output goes into a high-impedance state (figure 13). pwrgd is pulled high by the module? internal pullup current source, turning the module off. when the drain voltage drops below v dl and the gate voltage is greater than ? v gate - v gh , q2 turns on and pwrgd pulls low, enabling the module. the pwrgd signal can also be used to turn on an led or optoisolator to indicate that the power is good (figure 13) (see the component selection procedure section). when the drain voltage drops below v dl and the gate voltage is greater than ? v gate - v gh , mosfet q3 turns on, shorting i 1 to v ee and turning q2 off. the pullup current in the module pulls the pwrgd high, enabling the module. when the drain voltage of the max5921b/max5939b (see selector guide for complete selection) is high with respect to v ee (figure 12) or the gate voltage is low due to an undervoltage condition, the internal mosfet q3 is turned off so that i 1 and the internal mosfet q2 clamp pwrgd to the drain turning off the module. once the pwrgd and pwrgd outputs are active, the max5921/max5939 output does not toggle due to an overvoltage (ov) fault. gate voltage regulation gate goes high when the following startup conditions are met: uv is high, ov is low, the supply voltage is above v uvloh , and (v sense - v ee ) is less than 50mv. the gate is pulled up with a 45? current source and is regulated at 13.5v above v ee . the max5921/max5939 include an internal clamp that ensures the gate voltage of the external mosfet never exceeds 18v. during a fast-rising v dd , an additional dynamic clamp keeps the gate and sense potentials as close as possible to pre- vent the fet from accidentally turning on. when a fault condition is detected, gate is pulled low (see the load current regulation section). gate - v ee 10v/div drain 50v/div inrush current 5a/div 1ms/div figure 7. short-circuit protection waveform drain 20v/div v ee 20v/div i d (q1) 2a/div 400 s/div figure 8. voltage step-on input supply
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current 12 ______________________________________________________________________________________ overcurrent fault integrator the max5921/max5939 feature an overcurrent fault inte- grator. when an overcurrent condition is detected, an internal digital counter is incremented. the clock period for the digital counter is 32? for the 500? maximum current-limit duration version and 128? for 2ms maxi- mum current-limit duration devices. an overcurrent of less than 32? is interpreted as an overcurrent of 32?. when the counter reaches 500? (the maximum current- limit duration) for the max5921/max5939a, an overcur- rent fault is generated. if the overcurrent fault does not last 500?, then the counter begins decrementing at a rate 128 (maximum current-limit duty cycle) times slower than the counter was incrementing. repeated overcur- rent conditions generate a fault if the duty cycle of the overcurrent condition duty ratio is greater than the maxi- mum current-limit duty cycle (see figure 14). thermal shutdown the max5921/max5939 include internal die-tempera- ture monitoring. when the die temperature reaches the thermal-shutdown threshold, t ot , the max5921/ max5939 pull gate low and turn off the external mos- fet. if a good thermal path is provided between the mosfet and the max5921/max5939, the device offers thermal protection for the external mosfet. placing the max5921/max5939 near the drain of the external mos- fet offers the best thermal protection because most of the power is dissipated in its drain. after a thermal shutdown fault has occurred, the max5921_ turns the external fet off for a minimum time of t off , allowing the mosfet to cool down. the max5921_ device restarts after the temperature drops 20? below the thermal-shutdown threshold. the max5939_ latches off after a thermal shutdown fault. the max5939_ can be restarted by toggling uv low or cycling power. however, the device keeps the external fet off for a minimum time of t off when tog- gling uv. applications information sense resistor the circuit-breaker current-limit threshold is set to 50mv (typ). select a sense resistor that causes a drop equal to or above the current-limit threshold at a current level above the maximum normal operating current. typically, set the overload current to 1.5 to 2.0 times the nominal load current plus the dynamic load-capacitance charg- ing current during startup. choose the sense resistor power rating to be greater than (v cl ) 2 / r sense . v gate - v ee 2v/div i d (q1) 2a/div 10ms/div figure 9. automatic restart after a short circuit v ee v dd ov uv -48v v uv = 1.255 r4 + r5 + r6 r5 + r6 r4 r5 r6 3 2 4 8 v ov = 1.255 r4 + r5 + r6 r6 max5921 max5939 -48v rtn (short pin) -48v rtn figure 10. undervoltage and overvoltage sensing
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current ______________________________________________________________________________________ 13 pwrgd i 1 v ee v gh v dl ? v gate -48v r1 r2 q1 r3 c2 max5921b/f max5939b/f v in + v in - c3 v out + v out - on/off active-high enable module drain gate sense v ee v dd r4 r5 r6 * *diodes inc. smat70a uv ov -48v rtn (short pin) -48v rtn q2 q3 figure 11. active-high enable module pwrgd v ee v gh v dl ? v gate -48v r1 r2 q1 r3 c2 max5921a/e max5939a/e v in + v in - c3 v out + v out - on/off active-low enable module drain gate sense v ee v dd r4 r5 r6 * *diodes inc. smat70a uv ov -48v rtn (short pin) -48v rtn q2 figure 12. active-low enable module
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current 14 ______________________________________________________________________________________ component selection procedure: determine load capacitance: c l = c2 + c3 + module input capacitance determine load current, i load . select circuit-breaker current, for example: i cb = 2 x i load calculate r sense : realize that i cb varies ?0% due to trip-voltage tol- erance. set allowable inrush current: determine value of c2: calculate value of c1: determine value of r3: ? et r2 = 10 ? . if an optocoupler is utilized as in figure 14, deter- mine the led series resistor: although the suggested optocoupler is not specified for operation below 5ma, its performance is adequate for 36v temporary low-line voltage where led current would then be 2.2ma to 3.7ma. if r7 is set as high as 51k ? , optocoupler operation should be verified over the expected temperature and input voltage range to ensure suitable operation when led current 0.9ma for 48v input and 0.7ma for 36v input. if input transients are expected to momentarily raise the input voltage to >100v, select an input transient-voltage- suppression diode (tvs) to limit maximum voltage on the max5921/max5939 to less than 100v. a suitable device is the diodes inc. smat70a telecom-specific tvs. select q1 to meet supply voltage, load current, efficien- cy, and q1 package power-dissipation requirements: bv dss 100v i d(on) 3x i load dpak, d 2 pak, or to-220ab r vv ima in nominal led 7 2 35 () = ? ? r s c 3 150 2 = cc cx vv v gd in max gs th gs th 12 =+ ? ? ? ? ? ? ? () () () () c axc i l inrush 2 45 = ix mv r ior ii xi inrush sense load inrush load cb min ? + 08 40 08 . . () r mv i sense cb = 50 max5921a max5921e max5939a max5939e v ee ov uv sense gate drain pwrgd v dd gnd -48v c3 100 f 100v c2 15nf 100v r3 1k ? 5% r2 10 ? 5% q1 irf530 r1 0.02 ? 5% r4 549k ? 1% r5 6.49k ? 1% r6 10k ? 1% pwrgd *diodes inc. smat70a r7 51k ? 5% -48v rtn (short pin) * figure 13. using pwrgd to drive an optoisolator
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current ______________________________________________________________________________________ 15 the lowest practical r ds(on) , within budget constraints and with values from 14m ? to 540m ? , are available at 100v breakdown. ensure that the temperature rise of q1 junction is not excessive at normal load current for the package select- ed. ensure that i cb current during voltage transients does not exceed allowable transient-safe operating-area limitations. this is determined from the soa and tran- sient-thermal-resistance curves in the q1 manufacturer? data sheet. example 1: i load = 2.5a, efficiency = 98%, then v ds = 0.96v is acceptable, or r ds(on) 384m ? at operating temper- ature is acceptable. an irl520ns 100v nmos with r ds(on) 180m ? and i d(on) = 10a is available in d 2 pak. (a vishay siliconix sud40n10-25 100v nmos with r ds(on) 25m ? and i d(on) = 40a is available in dpak but may be more costly because of a larger die size). using the irl520ns, v ds 0.625v even at +80? so effi- ciency 98.6% at 80?. p d 1.56w and junction temper- ature rise above case temperature would be 5c due to the package jc = 3.1?/w thermal resistance. of course, using the sud40n10-25 will yield an efficiency greater than 99.8% to compensate for the increased cost. if i cb is set to twice i load , or 5a, v ds momentarily dou- bles to 1.25v. if c out = 4000?, transient-line input voltage is ? 36v, the 5a charging-current pulse is: entering the data sheet transient-thermal-resistance curves at 1ms provides a jc = 0.9?/w. p d = 6.25w, so ? t jc = 5.6?. clearly, this is not a problem. example 2: i load = 10a, efficiency = 98%, allowing v ds = 0.96v but r ds(on) 96m ? . an irf530 in a d 2 pak exhibits r ds(on) 90m ? at +25? and 135m ? at +80?. power dissipation is 9.6w at +25? or 14.4w at +80?. junction-to-case thermal resistance is 1.9?/w, so the junction temperature rise would be approximately 5c above the +25? case temperature. for higher efficien- cy, consider irl540ns with r ds(on) 44m ? . this allows = 99%, p d 4.4w, and t jc = +4? ( jc = 1.1?/w) at +25?. thermal calculations for the transient condition yield i cb = 20a, v ds = 1.8v, t = 0.5ms, transient jc = 0.12?/w, p d = 36w and ? t jc = 4.3?. layout guidelines good thermal contact between the max5921/max5939 and the external mosfet is essential for the thermal- shutdown feature to operate effectively. place the max5921/max5939 as close as possible to the drain of the external mosfet and use wide circuit-board traces for good heat transfer. see figure 15 for an example of recommended layout for kelvin-sensing current through a sense resistor on a pc board. t fx v a ms . == 4000 1 25 5 1 500 s x 128 v ol v sense v gate t 1 t 3h t 5h t 2l t 4l figure 14. max5921a overcurrent fault example sense resistor high-current path max5921 max5939 sense v ee figure 15. recommended layout for kelvin-sensing current through sense resistor
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current 16 ______________________________________________________________________________________ chip information transistor count: 2645 process: bicmos selector guide part dcen polarity fault management maximum current-limit duration (ms) maximum current-limit duty cycle max5921aesa active-low pwrgd autoretry 0.5 1/128 max5921besa active-high pwrgd autoretry 0.5 1/128 max5921eesa active-low pwrgd autoretry 2 1/128 max5921fesa active-high pwrgd autoretry 2 1/128 max5939aesa active-low pwrgd latched 0.5 1/128 max5939besa active-high pwrgd latched 0.5 1/128 max5939eesa active-low pwrgd latched 2 1/128 max5939fesa active-high pwrgd latched 2 1/128 ordering information (continued) part temp range pin-package max5921eesa* -40? to +85? 8 so max5921fesa* -40? to +85? 8 so max5939 aesa -40? to +85? 8 so max5939besa -40? to +85? 8 so max5939eesa* -40? to +85? 8 so max5939fesa* -40? to +85? 8 so * future product?ontact factory for availability.
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current ______________________________________________________________________________________ 17 max5921 max5939 v ee ov uv sense gate drain pwrgd v dd backplane circuit card gnd gnd (short pin) input1 input2 -48v (input1) -48v (input2) v in + v in - lucent jw050a1-e n t ypical operating circuit
max5921/max5939 -48v hot-swap controllers with external r sense and high gate pulldown current maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2006 maxim integrated products is a registered trademark of maxim integrated products, inc. package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) soicn .eps package outline, .150" soic 1 1 21-0041 b rev. document control no. approval proprietary information title: top view front view max 0.010 0.069 0.019 0.157 0.010 inches 0.150 0.007 e c dim 0.014 0.004 b a1 min 0.053 a 0.19 3.80 4.00 0.25 millimeters 0.10 0.35 1.35 min 0.49 0.25 max 1.75 0.050 0.016 l 0.40 1.27 0.394 0.386 d d min dim d inches max 9.80 10.00 millimeters min max 16 ac 0.337 0.344 ab 8.75 8.55 14 0.189 0.197 aa 5.00 4.80 8 n ms012 n side view h 0.244 0.228 5.80 6.20 e 0.050 bsc 1.27 bsc c h e e b a1 a d 0 -8 l 1 variations:
e nglish ? ???? ? ??? ? ??? what's ne w p roducts solutions de sign ap p note s sup p ort buy comp any me mbe rs m axim > p roduc ts > h ot-swap and p ower switc hing max5921, max5939 -48v hot-swap c ontrollers with external rsense and high gate pulldown c urrent quickview technical documents ordering info more information all ordering information notes: other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales . 1. didn't find what you need? ask our applications engineers. expert assistance in finding parts, usually within one business day. 2. part number suffixes: t or t&r = tape and reel; + = rohs/lead-free; # = rohs/lead-exempt. more: see full data sheet or part naming c onventions . 3. * some packages have variations, listed on the drawing. "pkgc ode/variation" tells which variation the product uses. 4. devices: 1-56 of 56 m ax5921 fre e sam ple buy pack age : type pins footprint drawing code/var * te m p rohs/le ad-fre e ? m ate rials analys is max5921aesa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5921fesa+t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5921fesa+ soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5921eesa+t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5921eesa+ soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5921besa+t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5921besa+ soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5921aesa+t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5921aesa+ soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5921fesa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5921fesa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5921eesa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5921aesa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis
max5921besa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5921besa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5921c esa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: see data sheet materials analysis max5921c esa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: see data sheet materials analysis max5921desa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: see data sheet materials analysis max5921desa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: see data sheet materials analysis max5921eesa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis m ax5939 fre e sam ple buy pack age : type pins footprint drawing code/var * te m p rohs/le ad-fre e ? m ate rials analys is max5939lesa rohs/lead-free: see data sheet max5939mesa rohs/lead-free: see data sheet max5939nesa rohs/lead-free: see data sheet max5939oesa rohs/lead-free: see data sheet max5939pesa rohs/lead-free: see data sheet max5939qesa rohs/lead-free: see data sheet max5939kesa rohs/lead-free: see data sheet max5939jesa rohs/lead-free: see data sheet max5939iesa rohs/lead-free: see data sheet MAX5939HESA rohs/lead-free: see data sheet max5939gesa rohs/lead-free: see data sheet max5939resa rohs/lead-free: see data sheet max5939aesa+t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5939besa+ soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5939besa+t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis
max5939c esa+ soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5939c esa+t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5939desa+ soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5939desa+t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5939eesa+ soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5939eesa+t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5939fesa+ soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5939aesa+ soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis max5939aesa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5939aesa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5939fesa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5939fesa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5939eesa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5939eesa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5939desa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5939desa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5939c esa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5939c esa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5939besa-t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5939besa soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8-5 * -40c to +85c rohs/lead-free: no materials analysis max5939fesa+t soic ;8 pin;31 mm dwg: 21-0041b (pdf) use pkgcode/variation: s8+5 * -40c to +85c rohs/lead-free: lead free materials analysis didn't find what you need? next day product selection assistance from applications engineers parametric search applications help
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